In P1010 QorIQ Ref Manual the minimal value for SDCLKFS is 0x01. This means that the base clock will be divided by at 2 at the minimum. The question is if I specify the value as 0x00 will the division occur?
clock freq = base clock /( (vv*2)*(x+1) )
where vv is the SDCLKFS value and x is the divisor. I my case the base clock is 200MHz and I need to set clock frequency to 40MHz. If ww=0 is a valid value I can set x=4 and get 40MHz, otherwise I do not see how it is possbile.
Any advice will be appreciated.