jiri-b36968

Vybrid TWR-VF65 debug

Discussion created by jiri-b36968 Employee on Sep 29, 2014

Dear Vybrid users,

 

TWR-VF65 rev. H can be debugged by:

  • on-board OpenSDA. CMSIS-DAP application needed. Default Virtual serial port application loaded. CMSIS-DAP + Virtual serial port application attached for your convenience (DS-5 5.19 and higher needed)

    or

    • external debugger connected to J5 (J-Link,Lauterbach, DSTREAM,....) or J11 (Lauterbach, DSTREAM).

     

    When used external debugger and Tower System is powered from the primary elevator then OpenSDA circuit blocks SWD/JTAG lines.

     

    To avoid this:

    • power Tower System from J3

    or

    • populate resistor R161 10k which is default DNP - bottom side, between U14 and U13 - see the picture below:

     

    The reason is that when powered from the primary elevator and U3 power is not present then OpenSDA is in reset state - default value of U14D is not set.

     

    Rev.G of TWR-VF65 has to be powered from U3, so workaround is not applicable here.

     

    /Jiri

    Original Attachment has been moved to: CMSIS-DAP-VSP-FSL-VID-PID.zip

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