Could someone please tell me the clock rate applied to the the timers in quad timer block on the SC3900s on a B4860QDS development kit.
I should not have to be doing experiments with the debugger and my wristwatch to find this out.
The four quad timers in the SC3900 subsystem operate at core speed (ie. 1.2GHz).
There are also device level timers available to all the cores of the SoC (see Chapter 33 of Reference Manual) which can operate with custom clock inputs (platform clock or CPRI clock).
Hope it helps.
Thanks for confirming that Adrian,
1.2GHz is what I expected .
Its very close to what I am finding using a chained 64 bit timer pair on DSP Core 0
Does using printf over JTAG stall the timers ?
Is there a GPIO/LED line on the B4860QDS I can easily toggle from DSP Core 0 ?
Printf will not stall the timers, however it eats a lot of cycles so it will add a lot to your timing measurements if inside the block.
You could activate SIG0-3 leds on the board by writing the following bytes:
(of course you'll need to map this in MMU)
First activate LEDs control:
0xF_FFDF_0005 write 0x02
Activate any of the 4 LEDS onboard:
0xF_FFDF_000e write 0x80
0xF_FFDF_000e write 0x40
0xF_FFDF_000e write 0x20
0xF_FFDF_000e write 0x10
you could try these fast from the ccs window
::ccs::write_mem 9 0xf 0xffdf0005 1 128 0x02
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0xf0
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0x00
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0x80
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0x40
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0x20
::ccs::write_mem 9 0xf 0xffdf000e 1 128 0x10
Thanks for that helpful info.
My next question …
Can you please tell me how to set up SC3900 Core 0 MMU to control the LEDs (and point me at the documentation that explains how to do so).
Assuming you're using SDOS on DSP, in the demo folders, you may find an "advanced_kernel_demo" which contains an mmu programming example. There you can substitute eg. appCheckDescriptor() with the following function
os_const_virt_ptr virt_addr = (os_const_virt_ptr)0x90000000; //or any virt address you prefer...
os_const_phys_ptr data_phys_addr = 0xFFFDF0000;
uint32_t size = 0x00001000;
os_mmu_attr attr = (os_mmu_attr)0x0006000000000006;
/*MMU data descriptor */
status = osMmuDataSegmentFind(&descriptor);
OS_ASSERT_COND(status == OS_SUCCESS);
status = osMmuDataSegmentCreate(descriptor, virt_addr, data_phys_addr,size , attr, NULL);
status = osMmuDataSegmentEnable(descriptor, TRUE);
OS_ASSERT_COND(status == OS_SUCCESS);
((uint8_t *) virt_addr)[0x5] = 0x02;
((uint8_t *) virt_addr)[0xe] = 0xF0;
((uint8_t *) virt_addr)[0xe] = 0x00;
The SDOS documentation is located in C:\Freescale\CW_SC_v10.xxx\SC\StarCore_Support\SmartDSP\doc\Manuals
If you need more info regarding MMU programming, please find it in the SC3900 Subsystem Reference Manual which you may find on the shared FSL extranet (direct email me if you need assistance with this).
Thanks for that Adrian
If its of help to others, here is a some stand alone code for working the LEDs from an SC3900 core without SDOS
#define CCSR_BASE 0xFEC00000UL
#define MMU_BASE_OFFSET 0x5000UL
// Returns value of COREREV register
asm static unsigned int getCorerevReg()
#define LEDS_VIRTUAL_ADDRESS 0x90000000
static unsigned char led_state = 0;
volatile int i;
// Set up MMU to access LEDS on B4860QDS board as per instructions received from Adrian Victor Raileanu<https://community.freescale.com/people/adrianraileanu?et=watches.email.thread> of Freescale
// This code taken from some C code generated by the MMU Configurator (see Starcore Targeting Manual)
unsigned int core_id_on_cluster = (getCorerevReg() & 0xC00) >> 10;
unsigned long M_DSDA_PL = (unsigned long)(CCSR_BASE + MMU_BASE_OFFSET + 0x88 + core_id_on_cluster * 0x8000);
unsigned long M_DSDB_PL = (unsigned long)(CCSR_BASE + MMU_BASE_OFFSET + 0x8C + core_id_on_cluster * 0x8000);
unsigned long M_DSDC_PL = (unsigned long)(CCSR_BASE + MMU_BASE_OFFSET + 0x90 + core_id_on_cluster * 0x8000);
unsigned long M_DSDM_PL = (unsigned long)(CCSR_BASE + MMU_BASE_OFFSET + 0x94 + core_id_on_cluster * 0x8000);
// Translation: 0x90000000 -> 0xfffdf0000, Entry Enabled: Enabled, Segment Size: 4KB, Task ID: 0
// DAPS: rw, Prefetch Policy: No prefetch, L2 Partitioning ID: 0, Peripheral Space: Peripheral, Write Through: Off
// Cacheable: Off, Bank0: Off, Stack Descriptor: Off, Guarded Segment: On, Coherent: Off
*(volatile unsigned long *)M_DSDA_PL = 0x90000807;
*(volatile unsigned long *)M_DSDB_PL = 0xffdf0000;
*(volatile unsigned long *)M_DSDC_PL = 0x6000f;
*(volatile unsigned long *)M_DSDM_PL = 0x5; // This should be the first free (disabled) descriptor
// bit of a delay needed here
for (i=0; i<32768; i++)
// This bit enables the LED control
((unsigned char*)LEDS_VIRTUAL_ADDRESS)[0x5] = 0x02;
((unsigned char*)LEDS_VIRTUAL_ADDRESS)[0xe] = 0xF0;
led_state = 0xF0;
((unsigned char*)LEDS_VIRTUAL_ADDRESS)[0xe] = 0x00;
led_state = 0x00;
led_state |= 0x10;
((unsigned char*)LEDS_VIRTUAL_ADDRESS)[0xe] = led_state;
led_state &= ~0x10;
led_state |= 0x20;
led_state &= ~0x20;
led_state |= 0x40;
led_state &= ~0x40;
led_state |= 0x80;
led_state &= ~0x80;
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