In k20d50m BSP for MQX4.1, the I2C0 pin config is done as below in init_gpio.c. There pctl->PCR and pctl->PCR are used to configure SCL and SDA for I2C0. It looks like it uses pin PTB2 and PTB3 instead of PTB0 and PTB1 as stated in K20P32M50SF0RM shown as snapshot below.
So question is, which PTB pins are correct?
#define ALT2 0x2
SIM_MemMapPtr sim = SIM_BASE_PTR;
pctl = (PORT_MemMapPtr)PORTB_BASE_PTR;
pctl->PCR = PORT_PCR_MUX(ALT2) | PORT_PCR_ODE_MASK; /* I2C0.SCL */
pctl->PCR = PORT_PCR_MUX(ALT2) | PORT_PCR_ODE_MASK; /* I2C0.SDA */
/* Enable SDA rising edge detection */
pctl->PCR |= PORT_PCR_IRQC(0x09);
pctl->PCR |= PORT_PCR_ISF_MASK;
sim->SCGC4 |= SIM_SCGC4_I2C0_MASK;
/* Do nothing if bad dev_num was selected */