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Question, i.MX6Q DDR calibration

Question asked by AVNET JAPAN FAE (team share account) on Sep 22, 2014
Latest reply on Sep 24, 2014 by Yuri Muhin

Dear team,

 

My customer is trying to integrate DDR calibration program into their software for their own board.

They saw some registers could have abnormal numbers after the calibration.

Could you give advice on the cause of getting abnormal numbers?

For example, the following register value was seen.

 

Write leveling calibration   | When normal  | Abnormal?

MMDC1_MPWLDECTRL0(021B_080C) | 0x00320035   | 0x00320035
MMDC1_MPWLDECTRL1(021B_0810) | 0x0047003D   | 0x0048003D
MMDC2_MPWLDECTRL0(021B_480C) | 0x0033004B   | 0x00010001
MMDC2_MPWLDECTRL1(021B_4810) | 0x003D0048   | 0x00010001

 

Read DQS Gating calibration  |              |
MPDGCTRL0 PHY0 (0x021b083c)  | 0x433F033F   | 0x433F033F
MPDGCTRL1 PHY0 (0x021b0840)  | 0x033F033B   | 0x033F033C
MPDGCTRL0 PHY1 (0x021b483c)  | 0x4349034D   | 0x4E001E00
MPDGCTRL1 PHY1 (0x021b4840)  | 0x0349032F   | 0x0E000E00

 

Read calibration            
MPRDDLCTL PHY0 (0x021b0848)  | 0x463D3D43   | 0x463E3C42
MPRDDLCTL PHY1 (0x021b4848)  | 0x42413A46   | 0x40404040


Write calibration           
MPWRDLCTL PHY0 (0x021b0850)  | 0x40464743   | 0x42474844
MPWRDLCTL PHY1 (0x021b4850)  | 0x4B324941   | 0x40404040
  |              |
Status registers             | |
MPDGHWST0 PHY0 (0x021b087c)  | 0x027F0001   | 0x027F0001
MPDGHWST1 PHY0 (0x021b0880)  | 0x027F0001   | 0x027F0001
MPDGHWST2 PHY0 (0x021b0884)  | 0x027B0001   | 0x027C0001
MPDGHWST3 PHY0 (0x021b0888)  | 0x027F0001   | 0x027F0001
MPDGHWST0 PHY1 (0x021b487c)  | 0x028D0001   | 0x07C007C0
MPDGHWST1 PHY1 (0x021b4880)  | 0x02890001   | 0x07C007C0
MPDGHWST2 PHY1 (0x021b4884)  | 0x026F0001   | 0x07C007C0
MPDGHWST3 PHY1 (0x021b4888)  | 0x02890001   | 0x07C007C0

The numbers written in red color above seem to be abnormal.

Their calibration program was made based on the example program written in AN4467.
The DDR they use for their board is DDR3/64bit bus.

 

Thanks,

Miyamoto

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