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MC9S08JM60 SRS Register Values on 5V vs 3.3V - ILOP Issue

Question asked by Jeremiah Gillis on Sep 20, 2014
Latest reply on Aug 21, 2015 by Johan de Vos

I wrote an application that uses that generates an illegal opcode (ILOP) to force a reset into a bootloader. The processor was originally connected to 5V. Since moving to 3.3V, my bootloader is never entered. When I generate an ILOP, my processor resets, but the SRS register does not show that an ILOP was performed. It shows that there was a power-on reset (POR) along with the low voltage detection (LVD). This lead me to believe that a POR was generated after the ILOP reset, causing another reset, POR, to clear the ILOP flag. The datasheet shows the Vpor threshold to be a maximum of 2.0V. I connected my scope up to the reset line and VDD to VSS. The voltage never dropped below 3.27V, and there was only one reset.


What else would cause a POR that would clear the ILOP?

Is there any other IO that can effect the POR circuit?

Has anyone else experienced this issue?



1. Reading or writing to the SRS has no effect on clearing the flags with this processor. The processor has to be reset to clear them. I do write to the SRS for the watchdog.

2. I have the exact same bootloader and application code in the 5V and 3.3V version. I have no issues with the 5V version.

3. The datasheet shows the processor will operate from 2.7V to 5.5V.


Update -

I discovered that I caused the POR due to disconnected power to the device when I read the SRS register. The only flag that is set when I perform the ILOP is the LVD flag in the SRS. So I still don't know why the ILOP flag isn't setting. The LVD should not be set as the LVDE is disables, to the LVD circuit is disabled. I have attached screenshots of the 3.3V vs the 5V which so the system and memory control registers. Both the 3.3V amd the 5V are running the exact same bootloader and application code.



3.3V Version



5V Version


Second Update


So I took the 5V board and regulated the supply voltage to Vdd and Vss. The ILOP flag does not function below 3.4V. Below 3.4V, the only flag that sets using illegal opcode to cause a reset is the LV flag. I think a Freescale engineer needs to get involved with this. For the interim, I am am going to clear my applications checksum to force the bootloader to take over after the reset.