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imx.6, EIM in burst mode, can BCLK be continuous?

Question asked by Francis Jeanson on Sep 15, 2014
Latest reply on Dec 9, 2014 by Yuri Muhin



We know that BCM is:

0: The burst clock runs only when accessing a chip select range with the SWR/SRD bits set. When the burst clock is not running it remains in a logic 0 state.

1 : The burst clock runs whenever ACLK is active (independent of chip select configuration)


why is there this note in the reference manual of imx.6 (rev2, 06/2014) section 22.9.7, p.1073, BCM bit:

"NOTE: This bit should be used only in async. accesses. No sync access can be executed if this bit is set."


I assume "used" means "1", and that "sync access" means SRD and SWR are set to 1.


in other words, can we have BCLK continuous in burst mode?


Thanks, Francis