Increasing internal LDO voltage causes ARM to hang

[norishinozaki]

Hello Champs,

My  customer using i.MX6DL is having trouble of supplying ARM core voltage through internal LDO.

They tried a following power scenario.

1. LDO 1.150V

・ CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

・ PMU_REG_CORE-REG0_TARG4–0）= 10010(1.150V, LDO Enable )

2. LDO Bypass

・ CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

・ PMU_REG_CORE-REG0_TARG（4–0）= 11111(-V, LDO Bypass )

3. LDO 1.450V

・ CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

・ PMU_REG_CORE-REG0_TARG（4–0）= 11110(1.450V, LDO Enable )

In this scenario, ARM hangs when setting #3.

However when they add a following intermediate  power mode between the #2 and #3,

2.1. LDO 1.425V

・ CPU=396MHz, PMIC-ARMCORE(SW1A/B)=1.3V

・ PMU_REG_CORE-REG0_TARG（4–0）= 11100(1.425V, LDO Enable )

ARM goes fine from #1, #2, #2,1 to #3.

Is there any time or some other restriction to increase voltage?

Best regards,

Nori Shinozaki

[igorpadykov · Accepted solution]

Hi Nori

Table 7 "Absolute Maximum Ratings" IMX6SDLCEC

defines max. 1.3V for VDD_ARM_CAP,

it can not be 1.425V.

Best regards

igor

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[norishinozaki]

Hello Igor,

Thanks, I simply thought 1.450V is Ok since it's listed in the RM...

Let me confirm on the value 11110 (0x1E).

In the Errata ERR005852 "Analog: Transition from Deep Sleep Mode to LDO Bypass Mode may

cause the slow response of the VDDARM_CAP output".

The workaround is "The software workaround to prevent this issue it to switch to analog bypass mode (0x1E), prior to

entering DSM, and then, revert to the normal bypass mode, when exiting from DSM"

Does this mean that 11110(0x1E) is a special value which turns digital LDO into "analog bypass mode"?

Best regards,

Nori Shinozaki