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PMU_REG_2P5[ENABLE_WEAK_LINREG] bit in i.MX6SDL.

Question asked by Keita Nagashima on Sep 8, 2014
Latest reply on Sep 8, 2014 by Keita Nagashima

Dear Sir or Madam,

 

Hello.

Refer to "51.3.2.1 Low Power Operation" in IMX6SDLRM(Rev.1).

There is description of "PMU_REG_2P5[ENABLE_WEAK_LINREG] bit".

But, I couldn't find this register.

 

On the one hand, I found this register in "50.7 PMU Memory Map/Register Definition" of IMX6DQRM(Rev.2).

 

[Question]

Why does not the "PMU_REG_2P5[ENABLE_WEAK_LINREG] bit" exist?

Does this bit exist?

 

Best regards,

Keita

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