XIRQ is getting cleared

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XIRQ is getting cleared

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vihaanred
Contributor III

Hi all,

 

i am facing the following problem, i want to use xirq as normal input port and not as an interrupt. while the code is executing  at some point in time the X bit in the CCR register is getting cleared and the xirq is acting as interrupt. Could someone please help me how to debug this issue and find out which instruction is actually causing this? There is only one place in code where I am doing andcc #$6f to enter into sleep mode for s12x.

 

regards,

vihaan

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kef2
Senior Contributor IV

You can only clear X bit. Once cleared, you can't set it again. You need to reset MCU to get X-interrupt masked.

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vihaanred
Contributor III

yeah it is true that we can only clear X bit. In my software i am not clearing it but it is happening accidentally i do not what is causing it? how to find out any suggestions?

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kef2
Senior Contributor IV

Oh, I thought your andcc #0x6f is clearing X as well, in fact it clears just S and I. I'm never using any nontrivial constants without comments about how this constant is constructed.

There are very few instructions, which may clear X-bit.

PULC

PULCW

RTI

TFR ??,CCR

So you may find all instances in your code and debug each instance. You shouldn't have a lot of these. Library code should include any of these instructions. So perhaps try disassembling you files and searching for all instances, then debug them all. 

To narrow search, if you know your code very well, you should check the following. It could be return from interrupt (RTI), while SP pointing to wrong location. It could be a write to stack frame while serving interrupt (uninitialized pointer or smth. like that). Save CCR, clear I-bit, ... restore CCR sequence, which accidentally destroys saved CCR.

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vihaanred
Contributor III

i think it is tough one but i will try my best. Is it possible that the debugger can break if written to X bit?

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kef2
Senior Contributor IV

I would suggest it if it would be possible to break on X->0.

If you can keep /XIRQ pin low, then try defining XIRQ interrupt handler and setting up breakpoint on it. Breakpoint will hit immediately after X->0. If stack is not garbaged, you could step out of ISR to the place where X is cleared.

Are you aware that /XIRQ=0 prevents power saving modes? /XIRQ=0 wakes up CPU even when CCR.X=1. This makes XIRQ pin not useful when wait or stop modes are required.

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