wdog not causing a reset

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wdog not causing a reset

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patrickfoley
Contributor I

OK, I think things are set up correctly but for some reason I am not getting a WDOG timeout-reset.  Things should be set to generate a WDOG timeout @ about 100 mS.  Once I initialiize the WDOG I go into an infinite loop waiting for the timeout event to occure.  Any help as to why I am not resseting would be appreciated.

 

I have attached my elf file to aid in debugging.

Original Attachment has been moved to: 8093_Rev_AA_1.elf.zip

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patrickfoley
Contributor I

OK I tried modifying my code to eliminate any confusion about the endianness of the cnt register.  I am now writing each individual byte of the unlock key.  Where my code used to be  WDOG_CNT = 0x20C5 it is now WDOG_CNTH = 0x20; WDOG_CNTL = 0xC5;  I am still getting issues.  As soon as I try to write the first byte of the unlock sequence I generate a WDOG reset.  This is also strange considering that the WDOG_EN bit is cleared.  I have tried writting to the Lower register first as I have seen some MCU's with the issue where byte order is important. I am at my wits end trying to get something as simple as a WDOG timeout to occure.  Either my code does not reset the devise, sets the WDOG registers appropriately BUT does not reset while in an inf. loop without refreshing the WDOG, OR I get a WDOG reset while trying to write the unlock/refresh sequence.  Again here is an elf file to aid in debugging.

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mjbcswitzerland
Specialist V

Hi

The following enables a 2s watchdog timeout on a Kinetis K-series processor:

WDOG_UNLOCK = WDOG_UNLOCK_SEQUENCE_1; // 16 bit write of 0xc520 to 0x4005200e

WDOG_UNLOCK = WDOG_UNLOCK_SEQUENCE_2; // 16 bit write of 0xd928 to 0x4005200e

WDOG_TOVALL = 2000; // this would be 100 for 100ms

WDOG_TOVALH = 0;

WDOG_STCTRLH = (WDOG_STCTRLH_STNDBYEN | WDOG_STCTRLH_WAITEN | WDOG_STCTRLH_STOPEN | WDOG_STCTRLH_WDOGEN); // set also WDOG_STCTRLH_ALLOWUPDATE to allow subsequent changes to be made

Regards

Mark

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mjbcswitzerland
Specialist V

Hi

From another thread it becomes clear that you are using a KE and not K. The KE code is:

WDOG_UNLOCK = 0x20c5;

WDOG_UNLOCK = 0x28d9;

WDOG_CS2 = (WDOG_CS2_CLK_1kHz | WDOG_CS2_FLG);

WDOG_TOVAL = BIG_SHORT_WORD(2000); // 2000ms

WDOG_WIN = 0;

WDOG_CS1 = (WDOG_CS1_EN); // enable watchdog - set WDOG_CS1_UPDATE to allow future updates

Note that the timeout value is big-endian:

#define BIG_SHORT_WORD(x) (unsigned short)((x << 8) | (x >> 8))

Regards

Mark

P.S. If you test with 100ms timeout with the TOVAL endian incorrectly you will get a timeout of about 25s instead of 100ms!

As you can see, the KE implementation is big-endian whereas the K implemetation is little-endian (although the watchdog is different it is otherwies very similar) so some confusion can result.

If you decide to use a KL it has a completely different watchdog again...

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