AnsweredAssumed Answered

i.Mx6 SPI-Slave interrupts

Question asked by Aarthi CR on Aug 22, 2014
Latest reply on Sep 28, 2015 by Robert Göllner

Hi All,

 

I am currently working on i.Mx6 SPI-Slave and I am able to communicate with Master.

(When I transmit 5 data from Master, Test register Rx count will also read as 5 and so on)

If I continuously transmit data from Master, RxFifo gets full and when I poll for the status register, status RO gets set. (as expected)

But I am neither getting ROEN nor RFEN interrupts. 

Have any one faced similar issue before with iMx6 SPI.

 

Whenever I start the device I get a TC interrupt and I dont receive subsequent interrupts..

 

Initialization process that I have followed right now

  1. Disable ECSPI block
  2. Enable ECSPI
  3. Enable clock
  4. Set control and config registers: SPI burst length set is 32 bit (1f)
  5. Enabled interrupts for ROEN, RFEN, RDREN, RREN

 

Please let me know if you need detailed configuration.

 

Thanks in advance.

Arti

Outcomes