i.MX6 WATCH DOG PINS

[vigneshvasudeva]

After going through the watchdog signal description given in iMXDQRM(page 5744,5755) I did understand that there are two signals getting generated in case of watchdog event.

1. WDOG_B

2. WDOG_RESET_B_DEB

Let me understand how the watchdog function is implemented with respect to the above mentioned signals in sabre-sd board so that I can practically understand the significance of each of those signals.

Also, what are the input and output pins of WatchDog unit exposed to user?

In my application, there are 2 processors. I want the WDOG-OUT of each processor to be monitored by the other processor. In this scenario, let me know where I should connect(which pin) the WDOG-OUT(timeout signal) of one processor as input to another processor in order to generate a global reset for the system.

Let me know in case you need any clarification.

[igorpadykov]

Hi Vignesh

WDOG_RESET_B_DEB is internal processor signal,

WDOG_B is external - it can be used for board reset, example

can be found on Sabre SD schematic SPF-27392 p.21

i.MX6_SABRE_SDP_DESIGNFILES

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------