changing output drive strength of extended mode register(EMR) in MDDR

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changing output drive strength of extended mode register(EMR) in MDDR

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geethar
Contributor II

How to change the output drive strength of mddr in imx2333?

which hardware register concerned with changing  the output drive strength of mddr in imx233?

I want to change it  full strength and half strength to find out the performance of device.

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Yuri
NXP Employee
NXP Employee

  According to the MT46H32M16LFBF  Datasheet, Extended Mode Register (EMR)

controls in particular drive strength. The EMR is programmed via the LOAD MODE REGISTER
command with BA0 = 0 and BA1 = 1. EMR bits 5,6,7 define memory drive strength.

< http://www.micron.com/~/media/Documents/Products/Data%20Sheet/DRAM/Mobile%20DRAM/Low-Power%20DRAM/LP... >


IMX23 provides EMR writing via setting bit field HW_DRAM_CTL38 [EMRS1_DATA] and

setting HW_DRAM_CTL09 [ WRITE_MODEREG ].


Have a great day,
Yuri

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geethar
Contributor II

I wanted to set the value 0x21 in EMR register.

can i  set the value to HW_DRAM_CTL38 [EMRS1_DATA] fileld?

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Yuri
NXP Employee
NXP Employee

Yes

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geethar
Contributor II

IN EMR register

I am setting BA1,BA0=10

drivestrength= halfstrength

partial array =full array

In EMR register ,address bus is mentioned like A0-A8,A9-An,BA0,BA1.

In HW_DRAM_CTL38 [EMRS1_DATA] fileld is a 12-bit field.

if  i take this EMR register as a 16-bit register , where the  BA0,BA1 bits occupy its position in 16 bit register?

In address bus A9-An whether n is a reference to the row selection or column selection?

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Yuri
NXP Employee
NXP Employee

Only low 12 bits of EMRS should be set for any of EMRS1_DATA or EMRS2_DATA bit fields.
Note, the i.MX23 uses fields EMRS1 and EMRS2 as provided in DDR2 specs (BA1=0, BA0=1 for EMRS1),
therefore  for Your mDDR the EMRS2 field of the i.MX23 should be applied (BA1=01, BA0=0),

assuming EMRS content (bits 5,6,7) legal for MT46H32M16LFBF.

Also, please let me remind, according to section 12.2.6.7 (Mobile DDR Devices)
of the i.MX23 Reference Manual :

“When using a mobile device, the HW_DRAM_CTL05_EN_LOWPOWER_MODE bit field must be set

to 1. This enables the memory controller to use the initialization sequence and EMRS addressing appropriate

to mobile devices. When the EN_LOWPOWER_MODE bit field is cleared to 0, a standard DDRSDRAM

device may be used”.


Have a great day,
Yuri

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geethar
Contributor II

I am using two chip selects(chip select 0 and chip select 1) for DDR initialization to utilize 128 MB of ram.

if i want to program EMRS2 _data fields,

Do i have to program the EMRS2_DATA_0 for chip select 0 in HW_DRAM_CTL38 and

EMRS2_DATA_1 for chip select 1 in HW_DRAM_CTL39 ?

while programming these registers only  EMRS2_DATA field of selected chip are set ,can i ignore the EMRS2_DATA of other chips and set it to reset value?

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Yuri
NXP Employee
NXP Employee

Correct.

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