IRQ stack placed in DDR using IMX6SL

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

IRQ stack placed in DDR using IMX6SL

560 Views
jparrish88
Contributor IV

Hello community,


Our board is crashing after boot-up and when the code starts accessing the EIM bus. This happens the moment that interrupts are enabled. The team believes that the information that is coming back on the EIM bus is corrupting the IRQ stack memory.

We don’t have this issue on the eval board that is using a imx6sl. That eval board uses a different chip that has the GPU and EPDC (MCIMX6L8DVN10AB). Our board that uses imx6sl that has no EPDC unit (MCIMX6L3DVN10AB).  Is there anything that we should know about the two devices that might affect the EIM of the processor when there is no EPDC? Any tips on solving this issue would be appreciated.

The OS is eCOS.

Message was edited by: Joshua Parrish

Labels (1)
Tags (3)
0 Kudos
1 Reply

427 Views
igorpadykov
NXP Employee
NXP Employee

Hi jparrish88

I do not think that problem is caused by IRAM.

IRAM is identical for both options of i.MX6SL, problem

may be caused by DDR, since (surely) new calibration

settings should be obtained from links below and used for

each processor differently. Also in code you should check

that there are no references to GPU and EPDC, if they are not persent

in one of these chips.

https://community.freescale.com/message/331721#331721

https://community.freescale.com/docs/DOC-96412

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------