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measurement during PWM off time

Question asked by vinod Karuvat on Jul 6, 2014
Latest reply on Nov 6, 2014 by Chris Brown



I am using the KL04 chip.

Some of the pins are being used in the PWM mode.

But, I need to make measurements during the PWM off time.

How can I monitor or do that.


How can I make sure that the measurements are being made during the

off time and not the on time.


One way is to monitor the TPM0_CNt. But this will keep adding latencies.

Page 511 of the datasheet says this -


30.4.6 Edge-Aligned PWM (EPWM) Mode

The edge-aligned mode is selected when (CPWMS = 0), and (MSnB:MSnA = 1:0). The

EPWM period is determined by (MOD + 0x0001) and the pulse width (duty cycle) is

determined by CnV.

The CHnF bit is set and the channel (n) interrupt is generated (if CHnIE = 1) at the

channel (n) match (TPM counter = CnV), that is, at the end of the pulse width.

This type of PWM signal is called edge-aligned because the leading edges of all PWM

signals are aligned with the beginning of the period, which is the same for all channels

within an TPM.

But this is not working fine. The reason being -

I have configured the interrupt to be at 50uSecs. Also , CHnIE = 1.

So as per this text it should go to the ISR twice - once for the end of the

PWM on time(i.e - end of the pulse width) and then at the end of the period.

So, if its 50% duty cycle it will go to the ISR at 25uSecs and the at 50uSecs.

But, it is entering it only once. Hence, we can say that the interrupt is done only at the end of the period.

So, how to find if the pwm on time is over.