AnsweredAssumed Answered

clocking LPTMR0

Question asked by stefano manca on Jul 2, 2014
Latest reply on Jul 3, 2014 by Dragos GALALAE

Hi, I'm using kl14z64, when I clock the timer LPTMR0 by SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; I observe that registers related to LPTMR0_XXX are initialized with not default value (see the pictures), in particular LPTMR0_CSR gets 0xC1 so when processor experts does  NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);    starts a spurious interrupt.lptmr0_registers.jpg

Any idea?


Thank you