Page 15 of the K60 data sheet gives the input leakage current for different input voltages on the digital (and other inputs). (I am looking at rev 5 of the datasheet, K60 Sub-Family, Rev5, 10/2013, K60P144M120SF3.pdf).
This shows that the input leakage for Vin<Vil is the sort of values expected (sub uA). It also shows that when Vin=Vdd the input leakage is as expected. But for Vil < Vin < Vdd the input leakage can rise a lot.
Surely there is a band just below Vin=Vdd where we can do worst case design assuming the input leakage is not so extreme? Spec suggests that at Vdd=3.3V we could see input leakages of ~23 uA for Vih < Vin < Vdd (scaling between Vdd=3 and Vdd=3.6V).
Is the information in the datasheet correct or is there a problem in the datasheet? An equality condition (Vin=Vdd) in the spec is useless; we are dealing with the real world here not some mathematical situation; under worst case design I can't assume equality!
I fully understand that between Vil and Vih there could be poor specs (such as input leakage currents and an increase in the chips quiescent current). But the rather poor input leakage spec applying above Vih is surprising.
Thanks for any comments,
Message was edited by: Ian Wilson Changed subject to reflect the real issue