SPI-NOR flash acess for i.MX6DL Sabre AI

[wy12218]

Hello All,

Have anyone ever get experiences on access of SPI-NOR flash for i.MX6DL Sabre AI?

I'm trying to leverage existing ECSPI and flash driver from i.MX6q Sabre Lite, the whole SPI phase transfer process status is good, but all data read from flash is 0xff (including data content and flash status itself).

After taking a serious look at back of CPU board, there is a wire-jumper just at back of SPI-NOR chips. I'm wondering is there any special hardware configuration required?

Thanks in advance

-Yu-

[igorpadykov]

Hi yu

no special hardware configuration required,

please look at Sabre AI schematic SCH-27767_a.pdf

i.MX6_SABRE_AI_DESIGNFILES : Design files

1-2 selects not boot from SPI-NOR

2-3 selects boot from SPI-NOR

Test SPI-NOR one can with SDK (one can run it with jtag) and oscilloscope

i.MX 6Series Platform SDK : Bare-metal SDK

Best regards

chip

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[wy12218]

Thanks a lot for your reply!

I indeed checked SCH-27767 and noticed the existence of J1000, but it doesn't work on any of these combinations. And I'm also curious does this boot option will impact SPI flash access in post-boot or run-time?

I also tried "sf probe" in u-boot, without any findings. Is it necessary to setup the jtag env and run " Test SPI-NOR"?

BTW, there's a little suspension on the wired jumper right behind the SPI-NOR chip on the CPU board, have you ever seen this before and get a chance to know what is it for?

BR,

-Yu-

[igorpadykov]

Hi yu

please check that "spi-nor" was used in kernel parameters,

this is described in Table 6 "Kernel Boot Parameters"

i.MX_6Dual6Quad_SABRE-AI_Linux_Release_Notes.pdf.

Check that you used correct images for this board (SABRE-AI).

L3.0.35_4.1.0_LINUX_DOCS

L3.0.35_4.1.0_DEMO_IMAGE_BSP :

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=RDIMX6SABREAUTO&fpsp=1&tab=Design_Too...

Best regards

chip

[wy12218]

I've setup SDK test, but SPI NOR test failed on whatever option I switched with J3 as suggested by the test:

  Select test to run:

n

---- Running eCSPI test, type 'x' to exit.

Please select test:

        0 - NUMONYX SPI NOR

        x - to exit.

Please remove the jumper within J3 on the board.

Please enter y or Y to confirm.

y

Chip ID query FAIL.

NUMONYX SPI NOR test FAILED.

Please select test:

        0 - NUMONYX SPI NOR

        x - to exit.

[igorpadykov]

Hi yu

suggest to start test with jtag (step by step ) and checking signals

with oscilloscope.

Best regards

chip

[wy12218]

Thanks, I'll follow that.

BTW, after checking with the SDK source, I found one weird diff for sabre AI rev-a with rev-b and rev-c

In  ecspi1_iomuox_config.c, EIM_DATA 16-19 is configured for ecspi1, but in rev-a, each selected input register setup with inconsistent value:

HW_IOMUXC_ECSPI1_MISO_SELECT_INPUT_WR(BF_IOMUXC_ECSPI1_MISO_SELECT_INPUT_DAISY_V(CSI0_DATA06_ALT2));

HW_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_WR(BF_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_DAISY_V(CSI0_DATA05_ALT2));

HW_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_WR(BF_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_DAISY_V(CSI0_DATA04_ALT2));

HW_IOMUXC_ECSPI1_SS1_SELECT_INPUT_WR(BF_IOMUXC_ECSPI1_SS1_SELECT_INPUT_DAISY_V(DISP0_DATA15_ALT2));

Actually rev-b and rev-c setup these register as expected, only rev-a not follow the spec, do you have any idea on what lead this?

And I also saw GPIO19 is configured as ready pin for ecspi1, but didn't find it in sch-27767 connections. Is it necessary still?

Do really appreciate your response.

BR,

-Yu-

[igorpadykov · Accepted solution]

early boards may have some inaccuracies, so one needs to

follow latest board revisions, which are actually supported in software.

Best regards

chip

[wy12218]

That's been really helpful.

Thanks,

-Yu-