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State of GPIO during Reset and other unused peripherals

Question asked by Vignesh Vasudevan on Jun 23, 2014
Latest reply on Jun 23, 2014 by Yuri Muhin



We are using I.MX6Q in one of our solutions and we have couple of queries related to it.


Q1)     We are utilizing few GPOs to control the output enable(OE#) of Buffer ICs.


          We want to know the state of GPIO pins during reset condition, from table100 of i.mx6 datasheet we understood that the pull resistors are not enabled during reset condition and so it is necessary to use external pull resistor. Please let us know whether our understanding is correct.



Q2)     It is mentioned in page31 of I.MX6Q reference manual that if PCIe and SATA are not used, then the associated power pins of those peripherals should be grounded.


          But there is a note1 below the table saying "these supplies must remain powered if boundary scan test needs to be done". In our design, we are planning to use emulator and so the                 JTAG will be utilized for this purpose.




          So, would you suggest us to keep the supply pins of unused peripherals to be powered via a 0ohms resistor arrangement? If it matters, I would like to inform that we have grounded the JTAG_MOD pin of processor.