I've got a new hardware design that uses the processor and memory PCB layout from the Sabre SDP iMX6Q dev-kit. Many of the remaining SDP core features are used as well, but with a different layout. These include the power/PMIC, SD cards, USB and boot selection.
A minor hardware change was the addition of an additional eMMC chip connected to SD3. The major change is the use of the EIM to connect with a FPGA, however in our testing to date, the FPGA has been powered off.
So far we've:
Verified that all of the power supplies are up, and that POR_B is deserted 2mS after the last power supply is up.
Verified that the clocks are present on the crystals.
Verified that the boot configuration lines are at the same levels as those on the dev-kit. (We have the same boot switch that's on the dev-kit)
With the boot switches set to boot SD2 we observed that data/cmd//clk signals are being delivered to our SD card, but the sequence is not as long as the sequence from the SDP board.
We changed the boot switches to an invalid configuration and tried to use the USB Mfg Tool to download u-boot, however the PC that the USB is connected to reports 'an unknown device' when the cable is connected.
At this point I've re-read the processor RM and DS, along with everything I can find related to the hardware design, configuration booting...
Since the bulk of the design is the SDP, I'm out of guesses as to where the problem might be, but it seems to be pretty fundamental.