K22 - PE and Datasheet refer to deprecated DMA_EARS register?

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K22 - PE and Datasheet refer to deprecated DMA_EARS register?

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indraastra
Contributor II

We just switched from an K20 to a K22 microcontroller and noticed the PE eDMA component initialization had started hard-faulting when trying to set a mysterious new DMA_EARS register. Perplexed, we looked up the register in the K22 datasheet and found it cryptically described as "Enable Asynchronous Request in Stop Register" in the reference manual. We could not find any further description of its function or even what this "stop register" was. It is also notably missing from the K20 manual.

Commenting out the line in DMA_Init() which initialized the register value prevented the hard fault and allowed the DMA module to function as it did on the K20.

Is it possible that DMA_EARS was deprecated (or never present) and that the datasheet and register map are outdated? The only other valid reference to this register I can find on the web at large is in this header from mbed which claims it is deprecated:

http://mbed.org/users/mbed_official/code/mbed-src/rev/1fb5f62b92bd [warning: large file]

Thanks!

Vishal

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abdullahkahrama
Contributor IV

I can also see that Processor Expert has an option "Asynchronous Request" in the DMA_Init component. When I tick this checkbox, it compiles and runs fine. I have checked the code and seen the following line in DMA_init.c.

DMA_EARS = (DMA_EARS & (~DMA_EARS_MASK)) | DMA_EARS_VALUE;

Of course, I cannot see the option in the datasheet, too.

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KevinRosenbaum
Contributor I

I'm having the same issue as well.  I'm using the MK22FN1M0VLH12 with KDS 3 with all recent updates as of 2016-03-03.  I noticed this comment in the rev 5 of the K22 reference manual: "Removed DMA_EARS register in the DMA chapter".  Processor Expert, however, is still trying to set this register in DMA_Init() and causing a hard fault.

I can get around this by commenting out this generated code, but this isn't clean.  Can PE be updated?

Thanks,

Kevin

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perlam_i_au
Senior Contributor I

Hello Vishal:

I have been looking for information regard DMA_EARS register and at this moment I found that this register in fact is included on K22 family devices and at this moment there is not error reported with this register.

At this moment I would like to check what is going on with DMA_Init() function, you mention that if you comment this line your code works perfectly but I would like to know if you have debugged this function and if you know in which specific step does it crash?

If you want to share your code (at least the DMA_Init()) I would be glad to take a look.


Have a nice day,
Perla Moncada

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indraastra
Contributor II

Hi Perla,

Thanks for looking into this. We found it in the datasheet as well but the description was devoid of any real explanation of its function. Here is the autogenerated DMA.c:DMA_Init() with the commented-out DMA_EARS line in bold:

void DMA_Init(void)

{

  /* SIM_SCGC7: DMA=1 */

  SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;

  /* SIM_SCGC6: DMAMUX=1 */

  SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;

  /* DMAMUX_CHCFG0: ENBL=1,TRIG=0,SOURCE=0x14 */

  DMAMUX_CHCFG0 = (DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(0x14));

  /* DMAMUX_CHCFG1: ENBL=1,TRIG=0,SOURCE=0x15 */

  DMAMUX_CHCFG1 = (DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(0x15));

  /* DMAMUX_CHCFG2: ENBL=1,TRIG=0,SOURCE=0x16 */

  DMAMUX_CHCFG2 = (DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(0x16));

  /* DMA_CR: CX=0,ECX=0,EMLM=0,CLM=0,HALT=0,HOE=0,ERCA=0,EDBG=0 */

  DMA_CR &= (uint32_t)~(uint32_t)(

             DMA_CR_CX_MASK |

             DMA_CR_ECX_MASK |

             DMA_CR_EMLM_MASK |

             DMA_CR_CLM_MASK |

             DMA_CR_HALT_MASK |

             DMA_CR_HOE_MASK |

             DMA_CR_ERCA_MASK |

             DMA_CR_EDBG_MASK

            );

  /* DMA_DCHPRI0: ECP=0,DPA=0,CHPRI=0 */

  DMA_DCHPRI0 &= (uint8_t)~(uint8_t)(

                  DMA_DCHPRI0_ECP_MASK |

                  DMA_DCHPRI0_DPA_MASK |

                  DMA_DCHPRI0_CHPRI(0x0F)

                 );

  /* DMA_DCHPRI1: ECP=0,DPA=0,CHPRI=1 */

  DMA_DCHPRI1 = (uint8_t)((DMA_DCHPRI1 & (uint8_t)~(uint8_t)(

                 DMA_DCHPRI1_ECP_MASK |

                 DMA_DCHPRI1_DPA_MASK |

                 DMA_DCHPRI1_CHPRI(0x0E)

                )) | (uint8_t)(

                 DMA_DCHPRI1_CHPRI(0x01)

                ));

  /* DMA_DCHPRI2: ECP=0,DPA=0,CHPRI=2 */

  DMA_DCHPRI2 = (uint8_t)((DMA_DCHPRI2 & (uint8_t)~(uint8_t)(

                 DMA_DCHPRI2_ECP_MASK |

                 DMA_DCHPRI2_DPA_MASK |

                 DMA_DCHPRI2_CHPRI(0x0D)

                )) | (uint8_t)(

                 DMA_DCHPRI2_CHPRI(0x02)

                ));

  /* DMA_INT: INT15=0,INT14=0,INT13=0,INT12=0,INT11=0,INT10=0,INT9=0,INT8=0,INT7=0,INT6=0,INT5=0,INT4=0,INT3=0,INT2=1,INT1=1,INT0=1 */

  DMA_INT = (uint32_t)((DMA_INT & (uint32_t)~(uint32_t)(

             DMA_INT_INT15_MASK |

             DMA_INT_INT14_MASK |

             DMA_INT_INT13_MASK |

             DMA_INT_INT12_MASK |

             DMA_INT_INT11_MASK |

             DMA_INT_INT10_MASK |

             DMA_INT_INT9_MASK |

             DMA_INT_INT8_MASK |

             DMA_INT_INT7_MASK |

             DMA_INT_INT6_MASK |

             DMA_INT_INT5_MASK |

             DMA_INT_INT4_MASK |

             DMA_INT_INT3_MASK

            )) | (uint32_t)(

             DMA_INT_INT2_MASK |

             DMA_INT_INT1_MASK |

             DMA_INT_INT0_MASK

            ));

  /* DMA_EEI: EEI2=0,EEI1=0,EEI0=0 */

  DMA_EEI &= (uint32_t)~(uint32_t)(

              DMA_EEI_EEI2_MASK |

              DMA_EEI_EEI1_MASK |

              DMA_EEI_EEI0_MASK

             );

  /* DMA_EARS: EDREQ_2=0,EDREQ_1=0,EDREQ_0=0 */

  /*DMA_EARS &= (uint32_t)~(uint32_t)(

               DMA_EARS_EDREQ_2_MASK |

               DMA_EARS_EDREQ_1_MASK |

               DMA_EARS_EDREQ_0_MASK

              );*/

  /* DMA_TCD0_SADDR = &DMA_Constants[0] */

  DMA_TCD0_SADDR = (uint32_t)(&DMA_Constants[0]);

  /* DMA_TCD1_SADDR = DMA_Buffer */

  DMA_TCD1_SADDR = (uint32_t)(DMA_Buffer);

  /* DMA_TCD2_SADDR = &DMA_Constants[1] */

  DMA_TCD2_SADDR = (uint32_t)(&DMA_Constants[1]);

  /* DMA_TCD0_DADDR = 0x400FF0C0u */

  DMA_TCD0_DADDR = (uint32_t)(0x400FF0C0u);

  /* DMA_TCD1_DADDR = 0x400FF0C0u */

  DMA_TCD1_DADDR = (uint32_t)(0x400FF0C0u);

  /* DMA_TCD2_DADDR = 0x400FF0C0u */

  DMA_TCD2_DADDR = (uint32_t)(0x400FF0C0u);

  /* DMA_TCD0_CITER_ELINKNO: ELINK=0,CITER=0x0300 */

  DMA_TCD0_CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(0x0300);

  /* DMA_TCD1_CITER_ELINKNO: ELINK=0,CITER=0x0300 */

  DMA_TCD1_CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(0x0300);

  /* DMA_TCD2_CITER_ELINKNO: ELINK=0,CITER=0x0300 */

  DMA_TCD2_CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(0x0300);

  /* DMA_TCD0_BITER_ELINKNO: ELINK=0,BITER=0x0300 */

  DMA_TCD0_BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(0x0300);

  /* DMA_TCD1_BITER_ELINKNO: ELINK=0,BITER=0x0300 */

  DMA_TCD1_BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(0x0300);

  /* DMA_TCD2_BITER_ELINKNO: ELINK=0,BITER=0x0300 */

  DMA_TCD2_BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(0x0300);

  /* DMA_TCD0_NBYTES_MLNO: NBYTES=1 */

  DMA_TCD0_NBYTES_MLNO = DMA_NBYTES_MLNO_NBYTES(0x01);

  /* DMA_TCD1_NBYTES_MLNO: NBYTES=1 */

  DMA_TCD1_NBYTES_MLNO = DMA_NBYTES_MLNO_NBYTES(0x01);

  /* DMA_TCD2_NBYTES_MLNO: NBYTES=1 */

  DMA_TCD2_NBYTES_MLNO = DMA_NBYTES_MLNO_NBYTES(0x01);

  /* DMA_TCD0_SOFF: SOFF=0 */

  DMA_TCD0_SOFF = DMA_SOFF_SOFF(0x00);

  /* DMA_TCD1_SOFF: SOFF=1 */

  DMA_TCD1_SOFF = DMA_SOFF_SOFF(0x01);

  /* DMA_TCD2_SOFF: SOFF=0 */

  DMA_TCD2_SOFF = DMA_SOFF_SOFF(0x00);

  /* DMA_TCD0_ATTR: SMOD=0,SSIZE=0,DMOD=0,DSIZE=0 */

  DMA_TCD0_ATTR = DMA_ATTR_SMOD(0x00) |

                  DMA_ATTR_SSIZE(0x00) |

                  DMA_ATTR_DMOD(0x00) |

                  DMA_ATTR_DSIZE(0x00);

  /* DMA_TCD1_ATTR: SMOD=0,SSIZE=0,DMOD=0,DSIZE=0 */

  DMA_TCD1_ATTR = DMA_ATTR_SMOD(0x00) |

                  DMA_ATTR_SSIZE(0x00) |

                  DMA_ATTR_DMOD(0x00) |

                  DMA_ATTR_DSIZE(0x00);

  /* DMA_TCD2_ATTR: SMOD=0,SSIZE=0,DMOD=0,DSIZE=0 */

  DMA_TCD2_ATTR = DMA_ATTR_SMOD(0x00) |

                  DMA_ATTR_SSIZE(0x00) |

                  DMA_ATTR_DMOD(0x00) |

                  DMA_ATTR_DSIZE(0x00);

  /* DMA_TCD0_SLAST: SLAST=0 */

  DMA_TCD0_SLAST = DMA_SLAST_SLAST(0x00);

  /* DMA_TCD1_SLAST: SLAST=0xFFFFFD00 */

  DMA_TCD1_SLAST = DMA_SLAST_SLAST(0xFFFFFD00);

  /* DMA_TCD2_SLAST: SLAST=0 */

  DMA_TCD2_SLAST = DMA_SLAST_SLAST(0x00);

  /* DMA_TCD0_DOFF: DOFF=0 */

  DMA_TCD0_DOFF = DMA_DOFF_DOFF(0x00);

  /* DMA_TCD1_DOFF: DOFF=0 */

  DMA_TCD1_DOFF = DMA_DOFF_DOFF(0x00);

  /* DMA_TCD2_DOFF: DOFF=0 */

  DMA_TCD2_DOFF = DMA_DOFF_DOFF(0x00);

  /* DMA_TCD0_DLASTSGA: DLASTSGA=0 */

  DMA_TCD0_DLASTSGA = DMA_DLAST_SGA_DLASTSGA(0x00);

  /* DMA_TCD1_DLASTSGA: DLASTSGA=0 */

  DMA_TCD1_DLASTSGA = DMA_DLAST_SGA_DLASTSGA(0x00);

  /* DMA_TCD2_DLASTSGA: DLASTSGA=0 */

  DMA_TCD2_DLASTSGA = DMA_DLAST_SGA_DLASTSGA(0x00);

  /* DMA_TCD0_CSR: BWC=0,??=0,??=0,MAJORLINKCH=3,DONE=0,ACTIVE=0,MAJORELINK=0,ESG=0,DREQ=1,INTHALF=0,INTMAJOR=0,START=0 */

  DMA_TCD0_CSR = DMA_CSR_BWC(0x00) |

                 DMA_CSR_MAJORLINKCH(0x03) |

                 DMA_CSR_DREQ_MASK;

  /* DMA_TCD1_CSR: BWC=0,??=0,??=0,MAJORLINKCH=3,DONE=0,ACTIVE=0,MAJORELINK=0,ESG=0,DREQ=1,INTHALF=0,INTMAJOR=0,START=0 */

  DMA_TCD1_CSR = DMA_CSR_BWC(0x00) |

                 DMA_CSR_MAJORLINKCH(0x03) |

                 DMA_CSR_DREQ_MASK;

  /* DMA_TCD2_CSR: BWC=0,??=0,??=0,MAJORLINKCH=0,DONE=0,ACTIVE=0,MAJORELINK=0,ESG=0,DREQ=1,INTHALF=0,INTMAJOR=1,START=0 */

  DMA_TCD2_CSR = DMA_CSR_BWC(0x00) |

                 DMA_CSR_MAJORLINKCH(0x00) |

                 DMA_CSR_DREQ_MASK |

                 DMA_CSR_INTMAJOR_MASK;

  /* DMA_ERQ: ERQ2=0,ERQ1=0,ERQ0=0 */

  DMA_ERQ &= (uint32_t)~(uint32_t)(

              DMA_ERQ_ERQ2_MASK |

              DMA_ERQ_ERQ1_MASK |

              DMA_ERQ_ERQ0_MASK

             );

}

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perlam_i_au
Senior Contributor I

At this moment I suggest you to comment just the DMA_EARS configuration code on DMA_Init and use your code as is, I will contact with application engineers in order to confirm if this register has been removed or not for K22 device family.

Also, could you share your part number? and also the mask set for it.

I will try to reproduce the error but I really would like to know what exactly happen when you are debugging on the specific lines in wich DMA_EARS is written.

Please comment those lines and let me know what happen.


Have a nice day,
Perla Moncada

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