There is a problem with our product.
When we made prototype with iMX6 Solo (lot No. 1313), there was no problem.
They work properly.
When we began mass production with same board and iMX6 Solo (lot no.1351),
this problem occurred.
The data we stored in DDR3 SDRAM definitely changes.
The probability of this problem is clearly difference between lots as below.
Lot No. probability
This level of defectiveness is nothing short of extraordinary.
There is no change with software.
The difference is lot No. only.
Do we need to change some settings regarding DDR memory depends on CPU lot?
For example, are there any lot to lot differences about MPU configuration?
Is the latest Reference manual Rev. 1, 04/2013 ?
We immediately need even small bits of information.
This problem has huge impact on our production now.
Do you know something about this?