AnsweredAssumed Answered

The address problem about p2020rdb in Codewarrior

Question asked by Min Zhao on Jun 12, 2014
Latest reply on Jun 16, 2014 by Yiping Wang

Hello there,

I an designing a product using p2020cpu refering to the design of p2020rdb-pc. I have 4GB DDR, 32MB Nor Flash. My memory map:

                               0x0_0000_0000  0x0_ffff_ffff   DDR

                               0x1_e000_0000  0x1_e00f_ffff  CCSRBAR                                          

                               0xf_fe00_0000   0xf_ffff_ffff     NOR  (0xf_eff8_0000 uboot)

I have modify the base address of nor in LAW to 0xFFE000000,and the NOR configuration in MMU.

Now I found the following codes in p2020rdb_pc_init_rom.tcl.


# bit 0-17 = BASE addr: 0xFFFC0000

mem [CCSR 0x20100] = 0xFFFC0000

1)Why the L2SRBAR0 base address at 0xfffc0000 in p2020rdb-pc? Should I modify the address in my board?


# Set interrupt vectors in SRAM


reg ${SPR_GROUP}IVPR = 0xFFFF0000

# debug - (a valid instruction should exist to be fetched)

reg ${SPR_GROUP}IVOR15 = 0x0000F000

# program

reg ${SPR_GROUP}IVOR6 = 0x0000F700


# Put a valid opcode at debug and program exception vector addresses

mem v:0xFFFFF000 = 0x48000000

mem v:0xFFFFF700 = 0x48000000


Need I modify the code above?


Best regards,

Min Zhao