AnsweredAssumed Answered

About EIM parameter of EIM_CSx_B Valid to EIM_OE_B Valid in MX6DL.

Question asked by Keita Nagashima on Jun 2, 2014
Latest reply on Nov 18, 2014 by Keita Nagashima
Branched to a new discussion

Dear Sir or Madam,



Boot: Parallel NOR Flash (EIM_CS0)



Refer to Table 43. EIM Asynchronous Timing Parameters Table Relative Chip to Select in IMX6SDLAEC(Rev.3.0).

There is below description.

"WE35" : Max "3 + (OEA - RCSA)"

My customer set the OEA = 0 and RCSA = 0.

So, It should become WE35 = Max 3 [ns].


But, my customer observed WE35 = 20 [ns] with 1st access on custom board.


[Reproduce Steps]

I reproduced this issue following steps on SABRE-AI.

1. Start-up the SABRE-AI from Parallel NOR.

2. Measured 1st clocks of CS and OE.

3. You can see the 20 [ns] delay. 

[Question 1]

Why was WE35 = 20 [ns] observed with 1st clock?


[Question 2]

Refer to OEA bit of EIM_CSnRCR1 field descriptions in i.MX6SDLRM(Rev.1) (P.1043).

There is description of "If EIM_BOOT[2] is 1, the reset value for EIM_CS0RCR1 is 0b010".

Could you tell me the external pin connected with "EIM_BOOT[2]"?