AnsweredAssumed Answered

iMX6Q DSI channel clock configuration (HS and LP modes)

Question asked by Julio Cruz on Jun 2, 2014
Latest reply on Aug 24, 2017 by Alex Reddy

Hello,

I'm using a MIPI-DSI panel and trying to config the timing modifying the file: mxcfb_hx8369_wvga.c.

I can communicate with the panel controller in LP mode. I can get the status and setup other registers. However, the display don't show anything.

According with the panel controller, the clock period in HS mode must be greater than 4 ns however in the scope is 3sns. So, I think this could be the problem. To change the HS clock period I use the variable "max_phy_clk", however, the LP clock is also changed and I cannot setup the panel register (in LP mode).

Can I change the HS and LP clock independently?

Thanks for any suggestions,

JC

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