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LCD TFT interface with IPU

Question asked by alessandro piscozzo on May 30, 2014
Latest reply on Jun 3, 2014 by Yuri Muhin

Hi guys,

I'm developing a board based on i.MX6 processor.

I'm at the display interface section.

I need to drive an LCD TFT display on parallel standard bus with 6 bits per color.

Signals: VSYNC, HSYNC, DENABLE, CLK, R0...R5, G0...G5, B0...B5

My concern is about the "color bits".

The document "IMX6DQRM" at pag. 2700 says: "RGB - color depth fully configurable; up to 8 bits/value (color component)"

 

It means that (for example) I can connect "R2" to one of the "DISP_DATAxx"  indiscriminately? In other words: is it only up to the software level to configure the parallel bus interface?

 

Thank you in advance,

Alessandro Piscozzo

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