ICS trimming in PA16

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ICS trimming in PA16

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lucyperek
Contributor II

Hello,

just a simple question : how to trim PA16 internal clock by copying trim value to ICS_C3 if there is no non-volatile location

where this value could be stored after flash programming (at least I cannot find anything of this kind). In GB/GT/SH datasheets

it was so clearly explained..

In other words where is this enigmatic "factory reserved location" where theoretically the trim value is stored ?

Thanks in advance.

Jacek

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arpitaagarwal-b
NXP Employee
NXP Employee

Hello Jacek,

The location is 0xFF6FU. You can use this code to trim PA16 internal clock.

if (*(uint8_t*)0xFF6FU != 0xFFU) {   /* Test if the device trim value is stored on the specified address */

    ICS_C3 = *(uint8_t*)0xFF6FU;       /* Initialize ICS_C3 register from a non volatile memory */

    ICS_C4 = (uint8_t)((*(uint8_t*)0xFF6EU) & (uint8_t)0x01U); /* Initialize ICS_C4 register from a non volatile memory */

  }

And the same can be checked in_EntryPoint( ) by generating a code through Processor Expert. In this basic CPU initialization (WDOG disable and trimming) is done.

Thanks and Regards

Arpita Agarwal

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lucyperek
Contributor II

Hi Arpita,

thanks a lot for that info. ! Ok, clear but why it is not mentioned in Freescale manual ? Looking deeply into P&E algorithm I see that this address was used to store actual trim value.

So if these both locations ($FF6E:F) are still in use so where is the end of user flash to avoid corruption with stored parameters ? Datasheet shows that $FFAF is the end but inside

there are some reserved locations...

Best regards

Jacek

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