I have a question about i.MX6DQ design.
Please see No.4 of Table 2-4 in IMX6DQ6SDLHDG Rev.1.
There is the following description there.
"Only one 10 uF bulk capacitor should be connected to each of these on-chip LDO regulator outputs:
However, 22uF capacitor is used for VDDHIGH_CAP and NVCC_PLL_OUT in MCIMX6Q-SDP schematics (SPF-27392_C3.pdf).
And the above description is removed "HW Design Checking List for i.Mx6 Rev2.6.xlsx" in HW_Design_Checking_List_for_i.MX6DQP6DQ6SDL.
Which is correct?