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Memory Mapping with MC9S12DJ256

Question asked by Adam Gannon on Apr 14, 2014
Latest reply on Apr 18, 2014 by Adam Gannon

Hello Everyone,


I'm just starting off some work with the S12 series, specifically the DJ256. I am working out the memory mapping for the RAM, EE, and Registers.

Would someone with some more experience be able to comment if anything looks out of place?


My tentative configuration is:



INITEE     0x01     EEPROM mapped to 0x0000 - 0x0xFFF (4kB) and enabled

INITRM    0x39     RAM mapped to 0x1000 - 0x3FFF (12kB) and high-aligned

INITRG     0x40     Registers mapped to 0x4000 - 0x4800 (2kB)



Does this look okay? Is there a better configuration? And lastly, am I correct that the ROMHM bit in the MISC register should

be left at its default (unset, lower-half EE/ROM can be accessed)? I'd appreciate any help, thanks!