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Not getting the Max DMA Transfer Rate in Vybrid processor

Question asked by sathishkumar sigamani on Apr 8, 2014
Latest reply on May 7, 2014 by Ioseph Martinez Pelayo

I have Faraday EVB. In which, I am trying to find out the eDMA peak transfer rates (Mbytes/sec).


I have conducted the test by transferring 256KB (i.e Minor Loop Count= 262144, Major Loop Count=1)of data from one location to another.

DMA Channel used = 0th Channel

SADDR(source address) = 0x3f000000(IRAM)

DADDR(destination address) = 0x3f040000(IRAM)

SOFF = 32

DOFF =32

MinorLoopCount = 262144

MajorLoopCount =1

LastSourceAdjustment =0;


MinorLoopOffsetDest =0;





BWC = 3


The SYSCLK is selected as PLL1 PFD3 for 396MHz and ARM_DIV = 1,BUS_DIV = 3.


As per the datasheet "Vybrid_Reference_Manual_F_Series_-_Rev_3.pdf" in Table 22-1636. for 133.3 MHz frequency transferring data from SRAM to SRAM, I supposed to get 533.3MBytes/sec. But I am getting around 150MB/s


Can anyone support to identify what went wrong?  Thanks in advance.