Hi, I hope anyone can help me....
First of all, my facts:
I'm using CW V.1.4 (without PEX), to program a MK20DX128 (50MHz) There aren't any Problems while compilation but it doesn't work anyway.
I would like to generate a system clock of 48MHz with the help of the PLL and an external oszillator of 8MHz.
So I followed the datasheet to change the mode from FEI to PEE (see my zip file CLOCK.c // CLOCK_init())
Is there a fault in this initialisaton?
So in my opinion it should work^^ Now I would like to set up the WDOG timeout and there is my main problem!
I made the following calculation:
I have got a 48MHz System Clock => 1/48MHz = 20,83ns per tick
I have got two 16bit Timout Registers for the WDOG so there are 32bit in addition. => 2^32 = 4,294,967,296
Now I multiply the seconds per tick and the WDOG Register Value!
=> 20,83ns * 4,294,967,296 = 89,46s
There is the probelem! I have measuered the time and get a time of only 44,7s!!! So it's exactly the half time. Where is my fault in this calculation?
By the way I have got the same fault while using the PIT Module!
Thanks a lot to all!
Original Attachment has been moved to: CLOCK.c.zip