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mpc8548 can't receive the response from FPGA through SRIO

Question asked by 强 诸葛 on Apr 4, 2014
Latest reply on Apr 9, 2014 by Pavel Chubakov

in my project,powerpc (mpc8548) communicate with FPGA (kinect7 160t) through rapidio.

Two FPGA can communicate with each other through DIO or Msg or DoorBell ..

when FPGA send Msg to ppc, ppc can receive the Msg and FPGA receive the Response from ppc

But ppc can't receive  the Response from the FPGA, when ppc send  Msg to FPGA.

In the FPGA side, saw the response has sent as right format ,by capturing the signal of log_interface_SRIO_Core in debug mode; 

In the PPC side,  the bit 7 and bit 8 of LTLEDCSR register  has trun to 1;

bit7:    Packet Response Time-out  :  A required response has not been received within the specified timeout interval

bit8:    Unsolicited Response           :  An unsolicited/unexpected Response packet was received


the same problem appears ,when we use NWRITE_R or NREAD operation.

Have you come across this problem?

so what can I do?


thank you!