I am trying to use the MAC-NET core in the Vybrid uC in a TWR-VF65GS10 board (connected to a TWR-SER2 board). And I believe I have done everything that should be done to be able to send a random ethernet frame:
- clocks ungated and multiplexers set to use the external RMII clock,
- IO pins configured and multiplexers set,
- FIFO descriptors and buffers created and aligned with better-than-recommended alignment,
- disabled ENET, set registers to my liking (store&forward, CRC added by MAC-NET, RMII mode)
- initialized the PHY and set its registers to my liking,
- got the PHY to autonegotiate and detect the link conditions forced by the other side and report good link,
- fed back the negotiated speed to ENET,
- re-enabled ENET,
- prepared an ethernet frame into one of the buffers, set its flags,
- and set ENET0->TDAR = ENET_TDAR_TDAR_MASK.
If I understand correctly, now DMA should take over and either send the frame or signal any error, and then set TDAR to 0.
But nothing is happening. TDAR stays ==1 indefinitely. No changes in EIR either. And Wireshark also doesn't see anything.
I have tried using enhanced buffers and requested interrupt flags to see if any error flags appeared on their status fields. Nothing.
I have tried checking what the BSP does, and I don't see anything I could be missing.
I have tried different alignment sizes, either the minimum required ones or much bigger than recommended.
I have tried ungating all the CCGR clocks just in case I was missing something..., setting the MII_SPEED in MSCR slower than necessary..., tried different sizes of ethernet frames, ... nothing happens.
U-boot in the accelerometer demo boot disk does manage to ping the network, so the hardware is functional.
The RAM I am using is set to be non-cached.
Does anyone have any idea of what could be wrong?