AnsweredAssumed Answered

About NEON burst read/write by assembler instruction on i.MX6Q.

Question asked by Keita Nagashima on Apr 1, 2014
Latest reply on Apr 21, 2014 by Yuri Muhin

Dear Sir or Madam,

 

Hi.

I'd like to realize below transfer on i.MX6Q.

128Byte burst load/store with 64bit double precision registers(d0-d15) in ARM Cortex-A9 by using assembler instruction.

 

[Observed Result]

Write:

(2-beat) x 16

Read

(16-beat) x2

 

[Assembler Code]

NEONCopyPLD:

PLD   [r1,     #0x80]

 

PLDW  [r0,     #0x80]

VSTM  r0!,     {d0-d15}

 

SUBS  r2,  r2, #0x80

BGT NEONCopyPLD

 

[Question]

=Q1=

Is there an assembler instruction which is possible about 32-burst transfer except the VLDMVSTM direction?

 

=Q2=

In case of "Write" operation, it became (2 beat) x 16.

What setting is necessary for the 16-beat burst transfer?

 

Keita

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