I have several questions about SPI in Kinetis devices:
1. We need to use an MCU which has two separate SPI interfaces - one as Master and one as Slave.
How can I know which MCU supports this? I couldn't find any place which describes this, the closest I saw are product briefs, but it still doesn't show it exactly.
2. Does the K11 subfamily support two separate SPI interfaces - one as Master and one as Slave?
3. Does any of the Cortex M0+ KL1x support two separate SPI interfaces - one as Master and one as Slave?
4. If we develop support for the two SPIs on K1x, will the same firmware work also on KL1x?
5. Is there a pin compatible package between K1x and KL1x with both kinds of SPIs available on same pins?
6. Can both SPI master and SPI slave both use DMAs in parallel?
7. Is it possible to manually generate CS from regular GPIO and connect them to slaves while using the regular hardware SPI Master?