Martin Latal

MCF5223X: TCP/IP stack: AN3470SW Enable interrupts from switches (/IRQ1, /IRQ4, /IRQ7)

Discussion created by Martin Latal Employee on Aug 20, 2007
Latest reply on Aug 20, 2007 by Mark Butcher
Hi all,
If someone would like to use external interrupts from switches in AN3470SW, here is the proposal: 
 
The switch interrupts are disabled by default, the project just polls them. 
 
To enable interrupts for them, we could enable already pre-prepared code inside mcf5223_gpio_init function:
Code:
#if 1  // EMG - Need to poll Switch state from web server    /* Enable IRQ signals on the port */    MCF_GPIO_PNQPAR = 0        | MCF_GPIO_PNQPAR_IRQ1_IRQ1        | MCF_GPIO_PNQPAR_IRQ4_IRQ4        | MCF_GPIO_PNQPAR_IRQ7_IRQ7;        MCF_GPIO_PGPPAR = 0        | MCF_GPIO_PGPPAR_IRQ11_IRQ11;            /* Set EPORT to look for rising edges */    MCF_EPORT_EPPAR0 = 0        | MCF_EPORT_EPPAR_EPPA1_RISING        | MCF_EPORT_EPPAR_EPPA4_RISING        | MCF_EPORT_EPPAR_EPPA7_RISING;            MCF_EPORT_EPPAR1 = 0        | MCF_EPORT_EPPAR_EPPA11_RISING;            /* Clear any currently triggered events on the EPORT  */    MCF_EPORT_EPIER0 = 0        | MCF_EPORT_EPIER_EPIE1        | MCF_EPORT_EPIER_EPIE4        | MCF_EPORT_EPIER_EPIE7;           MCF_EPORT_EPIER1 = 0        | MCF_EPORT_EPIER_EPIE11;           /* Enable interrupts in the interrupt controller */ MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK1); //  MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK4); //  MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK7); //  MCF_INTC1_ICR35 = MCF_INTC_ICR_IL(4);    MCF_INTC1_IMRH &=  ~(MCF_INTC_IMRH_MASK35); #else

If we look at the code we will see the interrupts are being unmasked in the MCF_INTC0_IMRL interrupt mask register in this order:
Code:
mcf5223_gpio_init() {        ...    /* Enable interrupts in the interrupt controller */    MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK1); //     MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK4); //     MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK7); //     ...    MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASKALL);    ...}

 
However, the transition of the MCF_INTC0_IMRL[MASKALL] bit from 1 to 0 will set all the remaining 63bits to 1, therefore masking all interrupt sources.
 
If we modify the unmasking to the following order:

 

Code:
//maskall first    MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASKALL);    ...    MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK1); //     MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK4); //     MCF_INTC0_IMRL &=  ~(MCF_INTC_IMRL_MASK7); //

the interrupts from switches work then.

 

Additionally, if we slightly modified and moved the mcf5223_powerup_config() function call before mcf5223_gpio_init() function call, the poll_switches() function would detect SW1 and SW2 power up states correctly:

 

 

Code:
void mcf5223_powerup_config( void ){ //these two registers will be overwritten later in the mcf5223_gpio_init() if required MCF_GPIO_PNQPAR = 0; MCF_GPIO_PGPPAR = 0; powerup_config_flags = poll_switches() | 0x80;// powerup_config_flags = 0x01;   // DHCP enabled  }
Code:
mcf5223_gpio_init(){    ...    mcf5223_powerup_config();    mcf5223_gpio_init();    ...}


 



Message Edited by macl on 2007-08-20 03:42 PM

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