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RMII Ethernet with iMX6Q

Question asked by Andreas Zeiler on Mar 12, 2014
Latest reply on Jul 18, 2014 by j b

Hi,

 

I have a U-Boot 2009.08 and want to get it running on our board with iMX6q. The board has a rmii ethernet interface which I try to get running.

This uboot already runs on another board with same processor...

This new board uses a dp83848 ethernet phy. Phy is connected to the ENET interface of imx6q:

     MX6Q_PAD_ENET_MDIO__ENET_MDIO,

    MX6Q_PAD_ENET_MDC__ENET_MDC,

    MX6Q_PAD_RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT,

    MX6Q_PAD_ENET_TX_EN__ENET_TX_EN,

    MX6Q_PAD_ENET_TXD0__ENET_TDATA_0,

    MX6Q_PAD_ENET_TXD1__ENET_TDATA_1,

    MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN,

    MX6Q_PAD_ENET_RX_ER__ENET_RX_ER,

    MX6Q_PAD_ENET_RXD0__ENET_RDATA_0,

    MX6Q_PAD_ENET_RXD1__ENET_RDATA_1,

   

    /* Phy Reset */

    MX6Q_PAD_SD4_DAT2__GPIO_2_10,    

 

I've already measured clock and MDC and MDIO. I have a 50Mhz clock at ETHERNET_REF_OUT and about 6Mhz on MDC. MDIO also toggles when writing to phy.

I don't understand why I don't get a TX_EN when I try to ping. I get: (lines with // are my printf's)

 

//fec_init - 1

//miiphy_read

//phy_read - addr: 0x1 reg: 0x0

miiphy_read

//phy_read - addr: 0x1 reg: 0x0

//setFecDuplexSpeed - 1

//setFecDuplexSpeed - PHY_BMCR: 0x3100

//setFecDuplexSpeed - DEFAULT dup_spd: 0x0000

//__fec_mii_write - reg: 0000 val: 3300

FEC: Link is Up 786d

//fec_init - set rcr to rmii mode: 0x5EE0104

//ENET_RCR 0x5EE0104

Using FEC0 device

//fec_send - length 42

//fec_send - Link OK

TX timeout packet at 27857080

//fec_send - length 42

//fec_send - Link OK

TX timeout packet at 27857080

//fec_send - length 42

//fec_send - Link OK

TX not ready

TX timeout packet at 27857080

//fec_send - length 42

//fec_send - Link OK

TX not ready

TX timeout packet at 27857080

//fec_send - length 42

//fec_send - Link OK

TX not ready

TX timeout packet at 27857080

ping failed; host 10.0.0.84 is not alive

 

I also have a function called "enet_board_init" where I  first initialize the pad config and then reset the Phy. After that I set the pll config of the ETHERNET_REF_OUT pin. So i get 50Mhz clock for phy.

Then I check if Phy is powered. With command mii info I can read from phy and it shows me the right address and model info. When I read back the registers of phy I see that it has no link. but anything else seems to be configured right.

 

Can someone tell me where the problem is? Im looking in the mxc_fec.c file where the problem could be. But I don't know how to configure the board and ethenet for uboot. I just have one Infopage Freescale Technical Information Center

but it is not very helpful. It is rather confusing...

 

Andi

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