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I2S slave frame sync problem MK10DX128VLL7 PE SSI

Question asked by Okan ERCAN on Mar 5, 2014
Latest reply on Mar 7, 2014 by Okan ERCAN

Hi all,

 

    I am trying to communicate with WM8956 codec over I2S. I2S slave mcu is MK10DX128VLL7. I use processor expert v10.5.1, CodeWorrior 10.5.

WM8956 is I2S master sends TX_BCLK and TX_FS

MK10DX128VLL7 is I2S slave sends TX_Data

Yellow: TX_BCLK

Blue: TX_FS frame sync

Green: TX_data (send from kinetis)

I want to send 16bit data for each left and right channels. You can send 21bit for one channel in my clocking configuration. After frame sync signal is changed, TX_data should be like that first bit is empty next 16bits are data and last 4 bits should be empty. But as you can see from the scopes below highlighted with red circuls, there are changes while 4 last bits.  So I think MCU does not try to sync with Frame Sych signal.

My processor expert properties are also attached. Please give a suggestion...

Thank you...

scope2.pngscope1.pngprop1.pngprop2.png

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