I would like to ask about SPDIF_SR_CLK on i.MX6Solo.
My customer wants to use SPDIF Rx Clock for external Codec device.
In Figure 59-2 ‘SPDIF transceiver Clock Diagram’ in i.MX6SDL reference manual, we can see SPDIF Rx Clock which is produced from SPDIF_IN flows out from DPLL.
The customer wants to use this SPDIF Rx clock for external audio codec chip.
Is it possible to output this SPDIF Rx clock from SPDIF_SR_CLK pin?
If it is not possible, do you have any ideas to output the clock from i.MX6(from other pin via other route)?
If it is possible to output the clock from i.MX, please let me know the accuracy of the clock signal.