For software development, I am using the IAR Embedded Workbench for ARM 188.8.131.5204. Right now
I am having considerable difficulty getting the FlexBus interface to operate. I have some questions / comments:
- Any reads to the FlexBus Configuration registers (FB_CSAR0, FB_CSCR0, FB_CSMR0, FB_CSPMCR) results in PSP Exception Fault. FlexBus Configuration register addresses start at 0x4001_E000. I am able to read other Vybrid configuration registers without getting an exception. What are valid base addresses that can be set via the FB_CSARn register. Right now I have a base address of 0x30000000.
- According to the Vybrid Reference Manual Vybrid Reference Manual, Rev. 5, 07/2013, 184.108.40.206 Instantiation Information page 573, “By default, FlexBus clocks are disabled and have to be explicitly enabled by software” How is this done in the Vybrid ??? What Vybrid configuration registers have to be setup for this ???
- Any reads or writes to the base address 0x30000000, causes the Vybrid processor to “lock-up” without any fault indication. Communication between the Vybrid and the I-Jet Debugger is lost. I do not see any of the FlexBus signals change state (via scope).
- Can the FlexBus interface and NandFlash both co-exist ? Right now I have disabled NandFlash to avoid and multi-plexed I/O overlap…
- When I setup the IOMUXC for the FlexBus interface pins, do I need to set the SPEED, SRE, ODE, HYS, DSE, PUS, PKE, PUE, OBE and IBE in addition to MUX_MODE ?
- Can I get some sample code for setting up the FlexBus interface for the Vybrid processor ? I see examples for the Kinetis, but are there differences between setting up FlexBus in Vybrid vs Kinetis ???