I have two scenarios and I try to find out the missing configuration for the USDHC operations. I have created a JEDEC standard MMC driver with IMX6 adaptations. I have configured the clock and pads for the SD4 controller and power for the memory. I have it fully working when uploaded to the target via JTAG. The flash are empty but the ROM code are trying to read from SD4 (when the platform are booting) so all the necessary parts that are required are already done by the ROM code. Here is my concern; I think that I have set all of the necessary stuff that the ROM code are doing meaning that if my code runs without the ROM it should work but it does not.
The following have been done to verify this. I have set the BOOT_MODE to download mode meaning that the ROM has not run any USDHC activity when my code are executed. I think that I have checked all clocks and pad configuration but no luck. I can see activity on the CMD and CLK (400k) and the driver fails when running OCR. I found (in the TRM) PFD400 as a clock reference to the USDHC but it does not exist under the clock tree description. Maybe this is the missing part!?
Any part that are outside (I think that I have covered this area already) the USDHC and SD4 PADs would be a start to look if anyone knows about the USDHC operations.