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Entering low power mode at MPC5633M

Question asked by Pavel Havlik on Feb 19, 2014
Latest reply on Feb 28, 2014 by Pavel Havlik


I'd like to ask two questions about low power modes at MPC5633M.


According to "MPC5634M Microcontroller Reference Manual" I set SIU_HLT and execute 'wait' instruction.

First I set SIU_HLT of all modules and wait until SIU_HLTACK is set and than set SIU_HLT[CPUSTP] and execute wait.

Program gets stopped and if external interrupt comes, wait instruction exits. Problem is that power

consumption of the core running at 1.2V is very high during the wait. (cca. 25mA @1.2V)

In halt(stop?) mode shall be clocks into core gated so I don't know why it is so.

Does anybody have any explanation or hints how it works and how shall be the MCU put properly into halt mode?


Secondly I'd like to understand the relation of HID0[NAP|SLEEP|DOZE] flags to the SIU_HLT register. For now

I belive that these flags are just information flags going out of the core when MSR[WE] is set for the SoC to

know that user wants to enter some low power mode. Thay have nothing to do with real core low-power mode transition.

Is my understaning right?


Thank you in advance for any advices and explantions