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SPI slave mode receive register settings

Question asked by Mehmet Ali Ipin on Feb 14, 2014
Latest reply on Mar 6, 2014 by Juan Antonio Gutierrez Rosas

Dear Sir/Madam,

 

I need to implement a SPI slave mode data reception from a SPI master for Vybrid VF3x. Since MQX does not support slave mode, I have to written the following SPI0_MCR and SPI0_CTAR register settings.

Of course, I tested it, but did not see any character in SPI0_POP register, or an error flag, or an interrupt flag is set.

 

I can send characters either DMA or SPI in master mode, but I can not receive in slave mode.

I have added my code segment below, I would be grateful, if you have a look and check if something is wrong or some extra registers are also controlled.

 

With my best regards,

 

Mehmet Ali Ipin

 

 

 

 

 

SPI0_MCR &= ~SPI_MCR_MDIS_MASK;// Disable the module to change some bits..

#ifdef SPI_SLAVE_MODE

 

 

SPI0_MCR =  SPI_MCR_HALT_MASK
   |SPI_MCR_CLR_RXF_MASK
   |SPI_MCR_CLR_TXF_MASK
   |SPI_MCR_PCSIS(1)//CS0 inactive state = high;
   |SPI_MCR_ROOE_MASK// Enable shift registers
   |SPI_MCR_DCONF_MASK;

 

 

#else

SPI0_MCR = SPI_MCR_MSTR_MASK
   |SPI_MCR_HALT_MASK
   |SPI_MCR_CLR_RXF_MASK
   |SPI_MCR_CLR_TXF_MASK
   |SPI_MCR_PCSIS(1)//CS0 inactive state = high;
   |SPI_MCR_ROOE_MASK// Enable shift registers
   |SPI_MCR_DCONF_MASK;

 

 

#endif

SPI0_MCR |= SPI_MCR_MDIS_MASK;
SPI0_CTAR0 = SPI_CTAR_FMSZ(7)// 8 bit data will be received/transferred
   |SPI_CTAR_DBR_MASK
   |SPI_CTAR_PDT(7)
   |SPI_CTAR_BR(2)
   |SPI_CTAR_CPHA_MASK
   |SPI_CTAR_CPOL_MASK;

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