I'm experimenting - in a bare-metal approach using the SDK 1.1 - with the SSI peripherals available in an iMX6Q SoC. My goal at the end is to use an SSI peripheral to output 24bits stereo audio, and possibly to input 24bits stereo audio using audio buffers as short as 32 frames. Currently I'm using an evaluation board which uses a TLV320AIC3007 codec (Texas Instrument). It is connected to AUDMUX5, so I can use SSI2 (which is connected by default to AUDMUX5 after a reset).
Now my problem is how I should configure the SSI, specifically in order to be able to use the 2 sets of transmit (and receive) FIFOs (2-channels option).
I'm a bit puzzled by the settings in the SSIx_SCR register. Are these settings independent (I mean is any combination legal)? Do we need to activate the network mode in order to be able to use the 2-channels option?
If I have well understood, the I2S protocol implies a succession of left / right samples. In the case of the I2S "slave" mode, the RM (§220.127.116.11) says that the "normal/network" setting is overridden to "normal". In the case of the I2S "master" this "normal/network" mode setting is overridden to "network". In both cases (I2S slave or master) there's no mention of the 2-channels setting. Does that mean that when I2S is enabled the 2 FIFOs are always used whatever the 2-channels setting?
Sorry if my questions seems a bit unclear, but it just translate how I'm confused after the reading of the RM