I want to check about i.MX6Q.
There is a difference in power sequence the device(CPU side and PMIC side).
①Which(CPU side and PMIC side) is the right power-on sequence?
②It is not issue in either the power-on sequence ?
Device you are using is the following:
Document order number: IMX6DQ6SDLHDG Rev 1 (2013/06)
Chapter 4 Requirements for Power Management
4.2 Requirements for a generic interface between chip and PF0100
Table 4-1. Interface between the chip and PF0100
Document order number: MMPF0100 Rev 7.0 (2013/12)
6 Functional Block Requirements and Behaviors
6.1.1Device Start-up Configuration
Table 10. Start-up Configuration
Page 20-21(Pre-programmed OTP Configuration：F0)
③Why is there a difference in the PMIC and CPU?