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Instruction cache and QSPI XIP performance

Question asked by Nancy Jean Burkholder on Feb 11, 2014
Latest reply on Feb 14, 2014 by Edward Karpicz

I am exploring the QSPI XIP performance for an MQX application running on a TWR-VF65GS10 processor board. I added the capability to enable and disable the instruction cache.

 

if ( value )

   _ICACHE_ENABLE();

else

   _ICACHE_DISABLE();

 

The execution performance is the same for either setting. What would account for this behavior? Does the instruction cache help QSPI XIP performance?

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