What should i expect if i read the logic level of MISO pin by the PDIR register (GPIOx_PDIR & 0xx),unless the MUX is switched to GPIO from SPI_MISO alternate function?
Thanks.
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Hi Diego Colombo,
I don't know which chip you are used, but as I know, our Kinetis K ,KL, KE chip all has the funtion which you need. It is when you configure the pin to other function, not the GPIO function,
you still can read the GPIOx_PDIR to get the pin logic value.
Actually, in the chapter GPIO of our reference manual, it has detail description like the following:
So, if you use the Kinetis K ,KL, KE chip, you don't need to switch to GPIO, just read it directly! I already verify it successfully!
Wish my answer is useful to you!
Best regards!
Jingjing
Hi Diego Colombo,
I don't know which chip you are used, but as I know, our Kinetis K ,KL, KE chip all has the funtion which you need. It is when you configure the pin to other function, not the GPIO function,
you still can read the GPIOx_PDIR to get the pin logic value.
Actually, in the chapter GPIO of our reference manual, it has detail description like the following:
So, if you use the Kinetis K ,KL, KE chip, you don't need to switch to GPIO, just read it directly! I already verify it successfully!
Wish my answer is useful to you!
Best regards!
Jingjing
Many thanks Jingjining,thanks for hightlighting the part that i missed to notice reading the datasheet
Forgive me if i did't mention what uC i was talking of,
it is about KL series
Have a good day!
Diego