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Device tree entry for Ethernet PHY interrupt

Question asked by rajeshtripathi on Jan 22, 2014
Latest reply on Jan 28, 2014 by Jason Wang

P2020 processor is connected to three Ethernet PHYs as

 

eTSEC1 - mii

eTSEC2 - sgmii

eTSEC3 - sgmii

 

The interrupts lines from all three PHYs are connected to IRQ[6] of P2020.

 

What should be the entry for PHY interrupts in device tree?

 

This setup is not working

mdio@520 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
reg = <0x520 0x20>;

 

 

phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <6 1>;
compatible = "intel,lxt971";
reg = <0x0>;
};

 

 

phy2: ethernet-phy@2 {
device_type = "ethernet-phy";
interrupt-parent = <&mpic>;
interrupts = <6 1>;
reg = <0x2>;
};

 

 

phy3: ethernet-phy@3 {
device_type = "ethernet-phy";
interrupt-parent = <&mpic>;
interrupts = <6 1>;
reg = <0x3>;
};

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