How do I measure the system bus clock signals for IMAX.6?
Do You mean hardware measurements ?
It is possible to use the i.MX6 CLKO (CCM_CLKO1/2) to output different internal clocks.
GPIO_0 pins (in ALT0 mux mode) may be used as clock source CCM_CLKO1. For details, please use CCM_CCOSR, described in section 18.6.21 (CCM Clock Output Source Register (CCM_CCOSR)) of the i.MX6 SDL Reference Manual. Register SW_PAD_CTL_PAD_GPIO00 configures hardware options
of the output signal. Please refer to section 37.4.371 (Pad Control Register (IOMUXC_SW_PAD_CTL_PAD_GPIO00)).
Yes, I mean hardware measurements. But I'm sorry, you misunderstood what I said the problem. I mean that I can not measure EIM_BLCK signal for system bus.
Can you provide any way for me to measure it?
You may enable continuous BCLK. The Continuous BCLK feature is documented in the Reference Manual); also EIM_ACLK_FREERUN bit may be used .
As stated in section 22.5.1 (Continuous BCLK) of the i.MX6 SDL RM :
To let EIM work properly under continuous BCLK MODE, the initialization must follow
Procedure, described in the section :
“The recommended initialize flow is as follow
1. Disable EIM clock by clearing bit 4 of EIM_WIAR Register.
2. Select Continuous BCLK by setting bit 3 of EIM_WCR Register.
3. Enable DLL by setting bit 0 of EIM_DCR Register.
4. Enable EIM clock by setting bit 4 of EIM_WIAR Register.
5. Reset DLL by toggling bit 1 of EIM_DCR Register(1->0->1).
6. Wait for DLL lock (Both bit 0 and bit 1 of EIM_DSR Register are asserted).”
We use i.MX 6Dual/6Quad Applications Processor. About EIM_BCLK, I find that i.MX6 SDL RM and IMX6 DQRM are not the same.
Some registers are not described in IMX6 DQRM. Can you provide the Continuous BCLK feature in the IMX6 DQRM?
Only EIM Configuration Register (EIM_WCR) should be used for i.MX6 DQ (to configure continuous BCLK).
I still have a question. May I ask what is the difference between i.MX6 SDL RM document and IMX6 DQRM document about EIM?
For example: The i.MX6 SDL RM document has Continuous BCLK section. But IMX6 DQRM document does not have Continuous BCLK section.
You can see that i.MX6DQ even does not have the EIM_DCR register.
Sorry, you misunderstood what I meant. I mean why the IMX6 DQRM document doesn't have Continuous BCLK section?
I want to know more information about Continuous BCLK section in IMX6 DQRM document. Would you like to tell me?
I expect R&D will provide an update next week regarding the DLL difference in EIM block between MX6D/Q and MX6S/DL.
R&D answer is " Yes, iMX6D/Q WEIM design is different wth iMX6S/DL WEIM. iMX6D/Q WEIM do NOT support DLL feature. "
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